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327 | //////////////////////////////////////////////////
// File: xinc_math.asm
// Revision: 1.0
// Date: Oct. 23, 2004
// Author: Michael Broughton
//////////////////////////////////////////////////
#ifndef __MATH32__
#define __MATH32__
//////////////////////////////////////////////////
// Input Params:
// r0 = Operand 1 (Low Order)
// r1 = Operand 1 (High Order)
// r2 = Operand 2 (Low Order)
// r3 = Operand 2 (High Order)
// Output Params:
// r0 = Result (Low Order)
// r1 = Result (High Order)
// r2 = Undefined
// r3 = Undefined
//////////////////////////////////////////////////
Add32:
st r4,sp,0
mov r4,0b0000 // Stores the condition code for the result.
add r0,r0,r2 // Add the low order bytes.
bc CS,AddCarryToHighOrder // A carry was generated, add to the high order bytes.
bc ZC,AddHighOrderBytes
bis r4,r4,2 // Indicate that the low order result is zero.
bra AddHighOrderBytes
AddCarryToHighOrder:
bc ZC,ResultIsNotZero
bis r4,r4,2 // Indicate that the low order result is zero.
ResultIsNotZero:
add r2,r1,1 // Temporarily add the low order carry to high order operand 1.
bc VS,TryOtherOperand // Overflow occoured Try the other high order operand.
add r1,r1,1 // Add the low order carry to high order operand 1.
bc CC,AddHighOrderBytes
bis r4,r4,0 // Indicate that a carry was generated.
bra AddHighOrderBytes
TryOtherOperand:
add r3,r3,1 // Add the low order carry to high order operand 2.
bc VC,CarryDidNotCarry // Overflow occoured again. This is a special case.
mov r1,-1 // In this special case the high order result is always -1.
mov r3,0b1010 // In this special case the condition code is always 1010.
bra Add32_Return // Return the result.
CarryDidNotCarry:
bc CC,AddHighOrderBytes
bis r4,r4,0 // Indicate that a carry was generated.
AddHighOrderBytes:
add r2,r1,r3 // Temporarily add the high order bytes.
bc NC,ResultIsNotNegative
bis r4,r4,3 // Indicate that the result is negative.
ResultIsNotNegative:
add r2,r1,r3 // Temporarily add the high order bytes.
bc ZS,ResultIsZero
bic r4,r4,2 // Indicate that the result is non-zero.
ResultIsZero:
add r2,r1,r3 // Temporarily add the high order bytes.
bc VC,ResultDidNotOverflow
bis r4,r4,1 // Indicate that overflow occoured.
ResultDidNotOverflow:
add r1,r1,r3 // Add the high order bytes.
bc VC,ResultDidNotCarry
bis r4,r4,0 // Indicate that a carry was generated.
ResultDidNotCarry:
add r3,r4,0 // Move the condition code.
// bra Add32_Return // Return the result.
Add32_Return:
ld r4,sp,0
bra SetConditionCodes
//////////////////////////////////////////////////
// Input Params:
// r3 = Source
// r4 = Shift (-15:15)
// Output Params:
// r3 = Result
// r4 = Undefined
//////////////////////////////////////////////////
Shift16:
st r0,sp,0
st r1,sp,1
rol r3,r3,r4
add r0,r3,0
bc ZS,Shift16_Return
and r0,r4,0x8000
bc NS,Shift16Right
Shift16Left:
mov r0,0
add r1,r4,0
bra Shift16Loop
Shift16Right:
add r0,r4,16
mov r1,16
Shift16Loop:
bic r3,r3,r0
add r0,r0,1
sub r4,r0,r1
bc NE,Shift16Loop
Shift16_Return:
ld r0,sp,0
ld r1,sp,1
jsr r6,r6
bra Shift16
//////////////////////////////////////////////////
// Input Params:
// r0 = Source (Low Order)
// r1 = Source (High Order)
// r2 = Shift (-31:31)
// Output Params:
// r0 = Result (Low Order)
// r1 = Result (High Order)
// r2 = Undefined
//////////////////////////////////////////////////
Shift32:
st r3,sp,0
st r4,sp,1
st r5,sp,2
st r6,sp,3
add sp,sp,4
add r3,r2,0
bc ZS,Shift32_Return
and r3,r2,0x8000
bc NS,Shift32Right
Shift32Left:
mov r4,16
sub r4,r2,r4
bc UGE,Shift32LeftFar
add r3,r1,0
add r4,r2,0
jsr r6,Shift16
add r1,r3,0
add r3,r0,0
add r4,r2,-16
jsr r6,Shift16
add r1,r1,r3
add r3,r0,0
add r4,r2,0
jsr r6,Shift16
add r0,r3,0
bra Shift32_Return
Shift32LeftFar:
add r3,r0,0
jsr r6,Shift16
mov r0,0
add r1,r3,0
bra Shift32_Return
Shift32Right:
mov r4,-16
sub r4,r2,r4
bc LE,Shift32RightFar
add r3,r0,0
add r4,r2,0
jsr r6,Shift16
add r0,r3,0
add r3,r1,0
add r4,r2,16
jsr r6,Shift16
add r0,r0,r3
add r3,r1,0
add r4,r2,0
jsr r6,Shift16
add r1,r3,0
bra Shift32_Return
Shift32RightFar:
add r3,r1,0
jsr r6,Shift16
mov r1,0
add r0,r3,0
Shift32_Return:
sub sp,sp,4
ld r6,sp,3
ld r5,sp,2
ld r4,sp,1
ld r3,sp,0
jsr r6,r6
bra Shift32
//////////////////////////////////////////////////
// Input Params:
// r0 = Operand 1
// r1 = Operand 2
// Output Params:
// r0 = Result (Low Order)
// r1 = Result (High Order)
//////////////////////////////////////////////////
Multiply16:
st r2,sp,0
st r3,sp,1
st r4,sp,2
st r5,sp,3
st r6,sp,4
add sp,sp,5
mov r2,0
mov r3,0
mov r4,0
Multiply16Loop:
mov r5,1
rol r5,r5,r4
and r5,r5,r1
bc ZC,Multiply16SkipBit
st r0,sp,0
st r1,sp,1
st r2,sp,2
add sp,sp,3
add r0,r2,0
mov r1,0
add r2,r4,0
jsr r6,Shift32
sub sp,sp,3
ld r2,sp,2
add r2,r0,r2
add r3,r1,r3
ld r1,sp,1
ld r0,sp,0
Multiply16SkipBit:
add r4,r4,1
mov r5,16
sub r5,r4,r6
bc ULT,Multiply16Loop
Multiply16_Return:
sub sp,sp,5
ld r6,sp,4
ld r5,sp,3
ld r4,sp,2
ld r3,sp,1
ld r2,sp,0
jsr r6,r6
bra Multiply16
//////////////////////////////////////////////////
// Input Params:
// r3 = 0b000000000000NZVC
// Output Params:
// r3 = Undefined
// Condition Code Table:
// NZVC Example
// 0000 1 + 1
// 0001 32767 + (-1)
// 0011 (-32767) + (-32767)
// 0100 0 + 0
// 0101 1 + (-1)
// 0111 (-32768) + (-32768)
// 1000 1 + (-2)
// 1001 (-1) + (-1)
// 1010 1 + 32767
//////////////////////////////////////////////////
SetConditionCodes:
and r3,r3,0b1111
ld r3,ConditionCodeTable,r3
bra r3
SetConditionCode0000:
mov r3,1
add r3,r3,1
bra SetConditionCodes_Return
SetConditionCode0001:
mov r3,32767
add r3,r3,-1
bra SetConditionCodes_Return
SetConditionCode0011:
mov r3,-32767
add r3,r3,-32767
bra SetConditionCodes_Return
SetConditionCode0100:
mov r3,0
add r3,r3,0
bra SetConditionCodes_Return
SetConditionCode0101:
mov r3,1
add r3,r3,-1
bra SetConditionCodes_Return
SetConditionCode0111:
mov r3,-32768
add r3,r3,-32768
bra SetConditionCodes_Return
SetConditionCode1000:
mov r3,1
add r3,r3,-2
bra SetConditionCodes_Return
SetConditionCode1001:
mov r3,-1
add r3,r3,-1
bra SetConditionCodes_Return
SetConditionCode1010:
mov r3,1
add r3,r3,32767
bra SetConditionCodes_Return
UndefinedConditionCode:
bra @
SetConditionCodes_Return:
jsr r6,r6
bra SetConditionCodes
_code_section = @
@ = _data_section
ConditionCodeTable:
SetConditionCode0000
SetConditionCode0001
UndefinedConditionCode
SetConditionCode0011
SetConditionCode0100
SetConditionCode0101
UndefinedConditionCode
SetConditionCode0111
SetConditionCode1000
SetConditionCode1001
SetConditionCode1010
UndefinedConditionCode
UndefinedConditionCode
UndefinedConditionCode
UndefinedConditionCode
UndefinedConditionCode
_data_section = @
@ = _code_section
#endif
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